Es wurden 129 Produkte zu dem Suchbegriff fpgas in 6 Shops gefunden:

Tascam Sonicview 16; Digitalmischpult; AD/DA-Wandlung: 32Bit / 96kHz; Tascam HDIA-Mikrofonvorverstärker (High-Definition Instrumentation Architecture); FPGA-Mixing-Engine mit 54-Bit-Fließkommaverarbeitung und 96kHz Abtastrate; 44 Eingangskanäle (40 Mono, 2 Stereo); 22 flexible Ausgangsbusse + Stereosumme mit grafischem 31-Band-EQ; Visual Interactive Ergonomic Workflow-Oberfläche (VIEW) ermöglicht intuitive Bedienung mit drei Ansichtsmodi; mehrere gleichzeitige Ansichten über zwei 7-Zoll-Farb-Touchscreens; Latenz: 2 × Fs (20,8µs) in Mixing-Engine, 0,51ms Analog-zu-Analog; integrierte Dante-Schnittstelle mit 64 Ein- und Ausgänge (unterstützt Redundanz, AES67, DDM und SMPTE 2110); USB-Audiointerface mit 32 Ein- und Ausgängen; interne Zweispuraufnahme/-wiedergabe auf SD-Karte oder USB-Laufwerk; vier Multieffekt-Prozessoren; 16 + 1 motorisierte Fader (100mm); 16 Encoder mit Farb-LEDs; 16 LC-Displays mit Farb-LEDs für Kanalnamen sowie Anzeigen für Eingangspegel und dynamische Pegelabsenkung; 18 frei zuweisbare Tasten; sieben benutzerdefinierte Fader-Ebenen und acht DCA-Gruppen; Gigabit-Ethernet-Anschluss (1000BaseT); Ein- / Ausgänge: 16x Mic/Line-Eingang (3-Pol XLR, symmetrisch); 8x Line-Eingang (6,3mm Klinke, symmetrisch), max. Eingangspegel: +32dBu, Eingangsimpedanz: = 5kOhm; 2x Einschleifweg (6,3mm Klinke); 1x Talkback-Eingang (3-Pol XLR); 2x Stereoeingang L/R (Cinch); 16x Line-Ausgang (3-Pol XLR, symmetrisch), Ausgangsimpedanz: = 100Ohm; 2x Stereo-Kopfhörerausgang (1x 6,3mm Klinke, 1x 3,5mm Klinke); 2x Monitorausgang (3-Pol XLR), max. Ausgangspegel: +24dBu; 1x Lampenanschluss (4-Pol XLR); 1x Fußschalteranschluss (6,3mm Klinke); 1x Wordclock-In (BNC-Buchse); 1x Wordclock-Out/Thru (BNC-Buchse); 2x USB-Anschluss (1x Typ-B, 1x Typ-C); 1x GPIO mit acht Ein-/Ausgängen über Sub-D25-Anschluss; Fernsteuerung und Offline-Bearbeitung via Tascam Sonicview Software für Windows, macOS und iOS; kompatibel mit Mixing Station-App; zwei Tascam-Erweiterungssteckplätze (optionale Erweiterungskarten erhältlich für 32-Spur-SDXC-Recorder sowie MADI, AES/EBU und analoge Signale); Netzschalter mit Schutzvorrichtung; Abmessungen (B x H x T): 472 x 228,1 x 554,4mm; Gewicht: 13kg

*FPGAs * - Einstieg Schaltungen Projekte. Der Leitfaden für kreative Maker und Bastler / 49.9€ / Buch

Sipeed Tang FPGA PMOD Modul LED Schalter HDMI Kamera Digital Tube HUB75E

*Getting Started with FPGAs * - Digital Circuit Design Verilog and VHDL for Beginners / 38.99€ / ebook

Sipeed Tang FPGA PMOD Modul LED Schalter HDMI Kamera Digital Tube HUB75E

This book presents the methodologies and for embedded systems design, using field programmable gate array (FPGA) devices, for the most modern applications.  Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.

Sipeed Tang FPGA PMOD Modul LED Schalter HDMI Kamera Digital Tube HUB75E

This book presents the methodologies and for embedded systems design, using field programmable gate array (FPGA) devices, for the most modern applications.  Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.

Sipeed Tang FPGA PMOD Modul LED Schalter HDMI Kamera Digital Tube HUB75E

This book presents the methodologies and for embedded systems design, using field programmable gate array (FPGA) devices, for the most modern applications.  Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.

Sipeed Tang FPGA PMOD Modul LED Schalter HDMI Kamera Digital Tube HUB75E

ALIENTEK Logikanalysator DL16 250 MHz Max. Abtastrate 16 Kanäle Logikanalysator-Tools ARM FPGA Debug-Protokoll-Dekodierungssoftware

Low-Energy FPGAs: Architecture and Design is a primary resource for both researchers and practicing engineers in the field of digital circuit design. The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon. Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.

ALIENTEK Logikanalysator DL16 250 MHz Max. Abtastrate 16 Kanäle Logikanalysator-Tools ARM FPGA Debug-Protokoll-Dekodierungssoftware

Low-Energy FPGAs: Architecture and Design is a primary resource for both researchers and practicing engineers in the field of digital circuit design. The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon. Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.

ALIENTEK Logikanalysator DL16 250 MHz Max. Abtastrate 16 Kanäle Logikanalysator-Tools ARM FPGA Debug-Protokoll-Dekodierungssoftware

Since their introduction in 1984, Field-Programmable Gate Arrays (FPGAs) have become one of the most popular implementation media for digital circuits and have grown into a $2 billion per year industry. As process geometries have shrunk into the deep-submicron region, the logic capacity of FPGAs has greatly increased, making FPGAs a viable implementation alternative for larger and larger designs. To make the best use of these new deep-submicron processes, one must re-design one's FPGAs and Computer- Aided Design (CAD) tools. Architecture and CAD for Deep-Submicron FPGAs addresses several key issues in the design of high-performance FPGA architectures and CAD tools, with particular emphasis on issues that are important for FPGAs implemented in deep-submicron processes. Three factors combine to determine the performance of an FPGA: the quality of the CAD tools used to map circuits into the FPGA, the quality of the FPGA architecture, and the electrical (i.e. transistor-level) design of the FPGA. Architecture and CAD for Deep-Submicron FPGAs examines all three of these issues in concert. In order to investigate the quality of different FPGA architectures, one needs CAD tools capable of automatically implementing circuits in each FPGA architecture of interest. Once a circuit has been implemented in an FPGA architecture, one next needs accurate area and delay models to evaluate the quality (speed achieved, area required) of the circuit implementation in the FPGA architecture under test. This book therefore has three major foci: the development of a high-quality and highly flexible CAD infrastructure, the creation of accurate area and delay models for FPGAs, and the study of several important FPGA architectural issues. Architecture and CAD for Deep-Submicron FPGAs is an essential reference for researchers, professionals and students interested in FPGAs.

ALIENTEK Logikanalysator DL16 250 MHz Max. Abtastrate 16 Kanäle Logikanalysator-Tools ARM FPGA Debug-Protokoll-Dekodierungssoftware

In Security Trends for FPGA's the authors present an analysis of current threats against embedded systems and especially FPGAs. They discuss about requirements according to the FIPS standard in order to build a secure system. This point is of paramount importance as it guarantees the level of security of a system. Also highlighted are current vulnerabilities of FPGAs at all the levels of the security pyramid. It is essential from a design point of view to be aware of all the levels in order to provide a comprehensive solution. The strength of a system is defined by its weakest point; there is no reason to enhance other protection means, if the weakest point remains untreated. Many severe attacks have considered this weakness in order not to face brute force attack complexity. Several solutions are proposed in Security Trends for FPGA's especially at the logical, architecture and system levels in order to provide a global solution.